High electron mobility transistors (HEMTs) based on gallium nitride (GaN) are well-suited as high breakdown voltage devices due to a high energy band gap of 3.4 eV for GaN. This means that smaller device lengths can withstand comparably larger blocking voltages, resulting in lower on-resistance and capacitance. Due to the epitaxial processing widely used to fabricate multi-layer HEMT structures, most conventional HEMTs are lateral source-drain devices with an optional plug connection which extends through the III-nitride epitaxial stack in order to realize a quasi-vertical device. The thickness of the III-nitride epitaxial stack of such a structure must withstand the same blocking voltage as the lateral blocking voltage of the source-drain extension.
The voltage class of a conventional HEMT device can be adjusted by varying the epitaxial thickness. Such methods require long and expensive deposition of GaN layers, which causes significant wafer bow during high temperatures processing. Therefore, only a limited temperature budget can be applied in any post-epitaxial processing, potentially eliminating the possibility for n+ source/drain region implantation/activation.
The substrate underneath the lateral GaN HEMT can be removed to increase the breakdown voltage robustness of the device. However, removal of the substrate is rather difficult to achieve for large power devices due to a final device thickness of only a few micrometers. In addition, a generally flat device backside is preferred in order to provide a good thermal connection to the lead frame which prevents the use of deep trenches below the drift region.